In most designs, logic gates are connected to form more complex circuits. While no logic gate input can be fed by more than one output at a time without causing contention, it is common for one output to be connected to several inputs. The technology used to implement logic gates usually allows a certain number of gate inputs to be wired directly together without additional interfacing circuitry. The maximum fan-out of an output measures its load-driving capability: it is the greatest number of inputs of gates of the same type to which the output can be safely connected.

Maximum limits on fan-out are usually stated for a given logic family or device in the manufacturer's datasheets. These limits assume that the driven devices are members of the same family.

More complex analysis than fan-in and fan-out is required when two different logic families are interconnected. Fan-out is ultimately determined by the maximum source and sink currents of an output and the maximum source and sink currents of the connected inputs; the driving device must be able to supply or sink at its output the sum of the currents needed or provided (depending on whether the output is a logic high or low voltage level) by all of the connected inputs, while maintaining the output voltage specifications. For each logic family, typically a "standard" input is defined by the manufacturer with maximum input currents at each logic level, and the fan-out for an output is computed as the number of these standard inputs that can be driven in the worst case. (Therefore, it is possible that an output can actually drive more inputs than specified by fan-out, even of devices within the same family, if the particular devices being driven sink and/or source less current, as reported on their data sheets, than a "standard" device of that family.) Ultimately, whether a device has the fan-out capability to drive (with guaranteed reliability) a set of inputs is determined by adding up all the input-low (max.) source currents specified on the datasheets of the driven devices, adding up all the input-high (max.) sink currents of those same devices, and comparing those sums to the driving device's guaranteed maximum output-low sink current and output-high source current specifications, respectively. If both totals are within the driving device's limits, then it has the DC fan-out capacity to drive those inputs on those devices as a group, and otherwise it doesn't, regardless of the manufacturer's given fan-out number. However, for any reputable manufacturer, if this current analysis reveals that the device cannot drive the inputs, the fan-out number will agree.

When high-speed signal switching is required, the AC impedance of the output, the inputs, and the conductors between may significantly reduce the effective drive capacity of output, and this DC analysis may not be enough. See AC Fan-out below.

The fan-out is the number of inputs that can be connected to an output before the current required by the inputs exceeds the current that can be delivered by the output while still maintaining correct logic levels. The current figures may be different for the logic zero and logic one states and in that case we must take the pair that give the lower fan-out. This can be expressed mathematically as

Likewise, rather than simply wiring all 64 output bits to a single 64-input NOR gate to generate the Z flag on a 64-bit ALU, circuit designers have found that it runs much faster to have a tree – for example, have the Z flag generated by an 8-input NOR gate, and each of their inputs generated by an 8-input OR gate.

Unfortunately, due to the higher speeds of modern devices, IBIS simulations may be required for exact determination of the dynamic fan-out since dynamic fan-out is not clearly defined in most datasheets. (See the external link for more information.)